Column decoder of semiconductor memory device, and method of...

Details Column decoder of semiconductor memory device, and method of... Column decoder of semiconductor memory device, and method of...

2006-10-31

2008-08-26

Phung, Anh (Department: 2824)

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

C365S233100

Reexamination Certificate

active

07417917

ABSTRACT:
A column decoder of a semiconductor memory device includes an internal address output circuit, an address decoder, and a control circuit. The internal address output circuit converts an external column address into an internal column address and outputs the internal column address. The address decoder decodes a pre-decoded column address, which is obtained by decoding the internal column address, in response to a write column enable signal or in response to a read column enable signal activated earlier than the write column enable signal, and generates a column selection line signal for activating a memory cell designated by the external column address. The control circuit outputs a write signal or a read signal for controlling an output time of the internal column address. The address decoder generates a valid column selection line signal in response to a write signal in the write operation, and generates a valid column selection line signal in response to the read signal in a read operation.

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patent: 5848024 (1998-12-01), Cho
patent: 6839291 (2005-01-01), Shin
patent: 2002-025255 (2002-01-01), None
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patent: 10-2001-0070296 (2001-07-01), None
patent: 10-2005-0059948 (2005-06-01), None

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