Direct build-up layer on an encapsulated die package having...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

Reexamination Certificate

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C438S115000

Reexamination Certificate

active

07416918

ABSTRACT:
A packaging technology that fabricates a microelectronic package including build-up layers, having conductive traces, on an encapsulated microelectronic die and on other packaging material that surrounds the microelectronic die, wherein an moisture barrier structure is simultaneously formed with the conductive traces. An exemplary microelectronic package includes a microelectronic die having an active surface and at least one side. Packaging material(s) is disposed adjacent the microelectronic die side(s), wherein the packaging material includes at least one surface substantially planar to the microelectronic die active surface. A first dielectric material layer may be disposed on at least a portion of the microelectronic die active surface and the encapsulation material surface. At least one conductive trace is then formed on the first dielectric material layer to electrically contact the microelectronic die active surface. A barrier structure proximate an edge of the microelectronic package is formed simultaneously out of the same material as the conductive traces.

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“U.S. Appl. No. 09/660,757, Amendment Under 37 C.F.R. 1.312 filed Jan. 8, 2004”, 2 pgs.
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