Reference clock failure detection on serial interfaces

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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C370S222000, C370S235000

Reexamination Certificate

active

07434106

ABSTRACT:
The present invention is a system and method for determining clock rate failure in a serial communication interface. A complete clock rate failure can be detected. Alternatively, or in addition, the interface includes a rate matching buffer in which fill characters are added or deleted to accommodate minor clock variations. The number of fill characters added or deleted is monitored to determine whether clock variation is outside of a desired threshold.

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