Semiconductor device with electrostrictive layer in...

Details Semiconductor device with electrostrictive layer in... Semiconductor device with electrostrictive layer in...

2006-05-31

2008-10-07

Ngo, Ngan (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S402000, C257S418000, C257SE27006

Reexamination Certificate

active

07432542

ABSTRACT:
A semiconductor device includes a first semiconductor layer, and a first insulated-gate field-effect transistor of a first conductivity type that is provided in a major surface region of the first semiconductor layer. The semiconductor device further includes an electrostrictive layer that is provided on a back surface of the first semiconductor layer and applies a first stress along a channel length to a channel region of the first insulated-gate field-effect transistor when the first insulated-gate field-effect transistor is operated.

REFERENCES:
patent: RE32859 (1989-02-01), Marshall et al.
patent: 2007/0128827 (2007-06-01), Faris
patent: 2007/0287233 (2007-12-01), Zhan et al.
Thompson, S., et al., “A 90 nm Logic Technology Featuring 50nm Strained Silicon Channel Transistors, 7 layers of Cu Interconnects, Low k ILD, and 1 um2SRAM Cell”, IEDM Tech. Dig., pp. 61-66 (2002).
Ghani, T., et al., “A 90 nm High Volume Manufacturing Logic Technology Featuring Novel 45nm Gate Length Strained Silicon CMOS Transistors”, IEDM Techn. Dig., pp. 978-980 (2003).
Hoyt, J. L., et al., “Strained Silicon MOSFET Technology”, IEDM Tech. Dig., pp. 23-26 (2002).

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