Process of forming an electronic device including a...

Details Process of forming an electronic device including a... Process of forming an electronic device including a...

2006-03-15

2008-08-19

Loke, Steven (Department: 2818)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C257SE21014, C257S018000, C257S213000

Reexamination Certificate

active

07413970

ABSTRACT:
An electronic device can include a semiconductor fin overlying an insulating layer. The electronic device can also include a semiconductor layer overlying the semiconductor fin. The semiconductor layer can have a first portion and a second portion that are spaced-apart from each other. In one aspect, the electronic device can include a conductive member that lies between and spaced-apart from the first and second portions of the semiconductor layer. The electronic device can also include a metal-semiconductor layer overlying the semiconductor layer. In another aspect, the semiconductor layer can abut the semiconductor fin and include a dopant. In a further aspect, a process of forming the electronic device can include reacting a metal-containing layer and a semiconductor layer to form a metal-semiconductor layer. In another aspect, a process can include forming a semiconductor layer, including a dopant, abutting a wall surface of a semiconductor fin.

REFERENCES:
patent: 2003/0170958 (2003-09-01), Sugihara et al.
patent: 2005/0272190 (2005-12-01), Lee et al.
patent: 2006/0113522 (2006-06-01), Lee et al.
Collaert et al., “Tall Triple-Gate Devices with TiN/HfO2 Gate Stack,” 2005 Symposium on VLSI Technology Digest of Technical Papers, pp. 108-109.
Ghani et al., “A 90nm High Volume Manufacturing Logic Technology Featuring Novel 45nm Gate Length Strained Silicon CMOS Transistors,” 2003 IEEE, 3 pages.

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