In-service reconfigurable DRAM and flash memory device

Details In-service reconfigurable DRAM and flash memory device In-service reconfigurable DRAM and flash memory device

2006-05-17

2008-08-12

Nguyen, Viet Q (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185080, C365S185170, C365S185010

Reexamination Certificate

active

07411823

ABSTRACT:
A memory cell that has both a DRAM cell and a non-volatile memory cell. The non-volatile memory cell might include a flash memory or an NROM cell. The memory cell is comprised of a vertical floating body transistor with dual gates, one on either side of a vertical pillar of a substrate. One gate is a polysilicon gate and gate insulator that is adjacent to the floating body of the transistor and acts as a DRAM cell. The non-volatile memory cell is constructed on the other side of the pillar with a floating gate or NROM structure. The DRAM and non-volatile cells are linked by a drain region coupling the two cells to a memory array bitline. The bottom of trenches on either side of the pillar have source regions that are linked to respective source lines of the memory array.

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