Microcomputer having rewritable nonvolatile memory

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

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Details

C713S323000, C713S601000

Reexamination Certificate

active

07444529

ABSTRACT:
A CPU, when shifting to a sleep mode, discontinues the oscillating operations of an oscillation circuit and of a frequency multiplier circuit through a low power consumption control circuit. A flash power source circuit discontinues the oscillating operations of the circuits or interrupts or resumes the supply of an external power source in response to resumption of the halted operation. When the CPU is to be shifted to the sleep mode, the frequency multiplier circuit holds the set oscillation control conditions. When the oscillating operation is to be resumed, operates based on the oscillation control conditions that are held. When the sleep mode is reset, the CPU makes access to the mask ROM and immediately reads out a control program that is to be executed right after the wakeup.

REFERENCES:
patent: 5444664 (1995-08-01), Kuroda et al.
patent: 5550489 (1996-08-01), Raab
patent: 5708395 (1998-01-01), Yamauchi et al.
patent: 5789985 (1998-08-01), Yamauchi et al.
patent: 2004/0158761 (2004-08-01), Matsuoka et al.
patent: 2005/0091550 (2005-04-01), Tani
patent: A-H06-203183 (1994-07-01), None
patent: A-H06-231280 (1994-08-01), None
patent: A-2000-357947 (2000-12-01), None

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