Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
2002-06-27
2008-08-05
Chen, Alan S. (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S056000, C710S057000, C710S060000, C710S061000, C713S400000, C713S500000, C713S600000
Reexamination Certificate
active
07409474
ABSTRACT:
A media access controller, which includes an output buffer and a clock controller, is provided. The output buffer includes a first and second clock input. The first clock is configured to control data input into the buffer and the second clock is configured to control data output from the buffer. The clock controller is coupled to the output buffer and configured to regulate a first clock signal input into the first clock input to control the data input into the buffer.
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Broadcom Corporation
Chen Alan S.
Squire Sanders & Dempsey L.L.P.
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