Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2005-04-04
2008-09-02
Sparks, Donald (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S170000, C711S151000, C711S152000, C718S100000, C718S101000
Reexamination Certificate
active
07421544
ABSTRACT:
One embodiment of the present invention provides a system that facilitates concurrent non-transactional operations in a transactional memory system. During operation, the system receives a load instruction related to a local transaction. Next, the system determines if an entry for the memory location requested by the load instruction already exists in the transaction buffer. If not, the system allocates an entry for the memory location in the transaction buffer, reads data for the load instruction from the cache, and stores the data in the transaction buffer. Finally, the system returns the data to the processor to complete the load instruction. In this way, if a remote non-transactional store instruction is received during the transaction, the remote non-transactional store proceeds and does not cause the local transaction to abort.
REFERENCES:
patent: 5414839 (1995-05-01), Joshi
patent: 6272607 (2001-08-01), Baentsch et al.
patent: 6970970 (2005-11-01), Jung et al.
patent: 2006/0161740 (2006-07-01), Kottapalli et al.
Paleczny Michael H.
Wright Gregory M.
Grundler Edward J.
Otto Alan M
Park Vaughan & Fleming LLP
Sparks Donald
Sun Microsystems Inc.
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