Metal gate CMOS with at least a single gate metal and dual...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S369000, C257S412000, C257SE21637

Reexamination Certificate

active

07432567

ABSTRACT:
A complementary metal oxide semiconductor (CMOS) structure including at least one nFET and at least one pFET located on a surface of a semiconductor substrate is provided. In accordance with the present invention, the nFET and the pFET both include at least a single gate metal and the nFET gate stack is engineered to have a gate dielectric stack having no net negative charge and the pFET gate stack is engineered to have a gate dielectric stack having no net positive charge. In particularly, the present invention provides a CMOS structure in which the nFET gate stack is engineered to include a band edge workfunction and the pFET gate stack is engineered to have a ¼ gap workfunction. In one embodiment of the present invention, the first gate dielectric stack includes a first high k dielectric and an alkaline earth metal-containing layer or a rare earth metal-containing layer, while the second high k gate dielectric stack comprises a second high k dielectric.

REFERENCES:
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patent: 2004/0256700 (2004-12-01), Doris et al.
patent: 2005/0093104 (2005-05-01), Ieong et al.
patent: 2005/0116290 (2005-06-01), de Souza et al.
patent: 2005/0233562 (2005-10-01), Adetutu et al.
patent: 2006/0118879 (2006-06-01), Li
patent: 2006/0131652 (2006-06-01), Li
patent: 2006/0246740 (2006-11-01), Cartier et al.
patent: 2006/0270239 (2006-11-01), Triyoso et al.

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