Error correction for multiple word read

Details Error correction for multiple word read Error correction for multiple word read

2005-05-24

2008-09-30

Baker, Stephen M. (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

Reexamination Certificate

active

07430703

ABSTRACT:
An integrated circuit that accesses memory from data lines in multiple word increments having distributed error correction coding circuitry is described. The data lines are selectively coupled to a portion of the memory for a read of data stored in the portion of the memory. The read includes providing in parallel in the multiple word increments the data stored in the portion of the memory. The data lines are selectively tapped to provide the data from the read to flow in parallel in a first direction and in a second direction. The first direction provides the data to the data registers, and the second direction provides the data to be propagated in an error checking matrix of the distributed error correction coding circuitry.

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