Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate
2006-09-12
2008-09-16
Dinh, Son (Department: 2824)
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
C365S226000, C365S227000
Reexamination Certificate
active
07426147
ABSTRACT:
A power supply voltage control circuit supplying a power supply voltage to a memory cell array, including word lines extending along row direction, bit lines extending along column direction, plate lines extending along the row direction, and a plurality of unit cells disposed at intersections of word lines and bit lines, includes a word line control circuit for supplying a first voltage to the word lines; and a plate line control circuit for supplying a second voltage to the plate lines; and the power supply voltage control circuit provides an amount of current flow from the first voltage so as to keep the first voltage potential almost constant during increasing a value of the second voltage in a power-on sequence, firstly increasing a value of the higher voltage of two potential voltages: the first voltage and the second voltage capacitive coupled, and then increasing a value of the lower second voltage.
REFERENCES:
patent: 7260013 (2007-08-01), Park et al.
patent: 2003-196974 (2003-07-01), None
D. Takashima, et al., “High-Density Chain Ferroelectric Random-Access Memory (CFRAM)”, 1997 Symposium on VLSI Circuits Digest of Technical Papers, 1997, pp. 83-84.
Daisaburo Takashima, et al., “A Sub-40ns Random-Access Chain FRAM Architecture with a 7ns Cell-Plate-Line Drive”, 1999 IEEE International Solid-State Circuits Conference, Session 6, Paper MP 6.1, Digest of Technical Papers, Feb. 15, 1999, pp. 102-103.
Ogiwara Ryu
Takashima Daisaburo
Dinh Son
Kabushiki Kaisha Toshiba
Nguyen Nam
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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