DRAM memory with vertically arranged selection transistors

Details DRAM memory with vertically arranged selection transistors DRAM memory with vertically arranged selection transistors

2003-12-23

2008-05-13

Chen, Jack (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S302000

Reexamination Certificate

active

07372093

ABSTRACT:
The invention relates to a semiconductor memory, particularly a DRAM, in which the memory cells in each case have a trench capacitor arranged in a lower area of a trench hole and a vertical selection transistor which is formed adjoining an upper area of the trench hole and which connects an inner electrode of the trench capacitor to a bit line, a conductive channel being capable of being formed in dependence on the potential of a word line in the channel area, the channel area completely enclosing the trench hole in its upper area, and the associated word line at least partially enclosing the channel area.

REFERENCES:
patent: 5561308 (1996-10-01), Kamata et al.
patent: 6262448 (2001-07-01), Enders et al.
patent: 6363484 (2002-03-01), Cordery et al.
patent: 6406970 (2002-06-01), Kudelka et al.
patent: 6770928 (2004-08-01), Sommer et al.
patent: 6876025 (2005-04-01), Sommer et al.
patent: 2004/0197989 (2004-10-01), Sommer et al.
patent: 199 54 867 (2000-12-01), None
Office Action from German Patent and Trademark Office dated Aug. 13, 2003.

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