Method of fabricating a transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions...

Reexamination Certificate

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Details

C438S151000, C438S154000, C438S199000, C438S300000, C438S302000, C257S315000, C257SE21427, C257SE21703

Reexamination Certificate

active

07374975

ABSTRACT:
A method of forming a transistor reduces leakage current and hot carrier effects, and therefore improves current performance. The method of forming a transistor includes selectively etching the semiconductor substrate to form a substrate protrusion and expose a buried source/drain implant region. A gate insulating layer covers the substrate protrusion and the first source/drain region. A gate conductor layer is selectively etched to form a gate pattern covering the sidewalls of the substrate protrusion and a portion of the semiconductor substrate adjacent to the sidewalls of the substrate protrusion. A second source/drain region is stacked over the top of the substrate protrusion. Contacts connected to the gate pattern and the first and second source/drain regions.

REFERENCES:
patent: 2005/0139911 (2005-06-01), Kim
patent: 2005/0142730 (2005-06-01), Kim
patent: 2006/0263985 (2006-11-01), Kang et al.

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