System and method for enabling a vendor mode on an...

Details System and method for enabling a vendor mode on an... System and method for enabling a vendor mode on an...

2004-09-14

2008-09-02

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07421667

ABSTRACT:
A system and method for enabling a vendor mode on an integrated circuit. A method is disclosed for applying a potential to a no-connect pin, whose function is unknown to the customer, to prevent the accidental enabling of the vendor mode. Applying the potential to the no-connect pin while concurrently applying a distinct sequence of logic values to other pins signals the deliberate intention to activate the vendor mode.

REFERENCES:
patent: 4677548 (1987-06-01), Bradley
patent: 5796746 (1998-08-01), Farnworth et al.
patent: 5914968 (1999-06-01), Keeth
patent: 5936974 (1999-08-01), Roberts et al.
patent: 6240535 (2001-05-01), Farnworth et al.
patent: 6286115 (2001-09-01), Stubbs
patent: 6606270 (2003-08-01), Mullarkey
patent: 6615391 (2003-09-01), Brown et al.
patent: 2002/0002696 (2002-01-01), Park
patent: 2002/0186603 (2002-12-01), Kyung

Affiliated with

Also associated with

Rating

System and method for enabling a vendor mode on an... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System and method for enabling a vendor mode on an..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for enabling a vendor mode on an... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3984400