Semiconductor device having a self-aligned contact structure

Details Semiconductor device having a self-aligned contact structure Semiconductor device having a self-aligned contact structure

2004-10-12

2008-03-04

Doan, Theresa T (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S295000, C257S303000

Reexamination Certificate

active

07339221

ABSTRACT:
A semiconductor device includes a silicon substrate having an active region, a memory transistor having a pair of source/drain regions and a gate electrode layer, a hard mask layer on the gate electrode layer having a plane pattern shape identical with that of the gate electrode layer, and plug conductive layers each electrically connected to each of the pair of source/drain regions. An extending direction of the active region is not perpendicular to that of the gate electrode layer, but is oblique. Upper surfaces of the hard mask layer and each of the plug conductive layers form substantially an identical plane. This can attain a semiconductor device allowing significant enlargement of a margin in a photolithographic process, suppression of an “aperture defect” as well as ensuring of a process tolerance of a “short” by decreasing a microloading effect, and decrease in a contact resistance, and a manufacturing method thereof.

REFERENCES:
patent: 6586794 (2003-07-01), Nakamura et al.
patent: 6967365 (2005-11-01), Summerfelt et al.
patent: 2004/0188745 (2004-09-01), Kim et al.
patent: 2000-353793 (2000-12-01), None

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