Methods and apparatus for read/write control and bit...

Details Methods and apparatus for read/write control and bit... Methods and apparatus for read/write control and bit...

2006-02-17

2008-09-02

Nguyen, Tuan T (Department: 2824)

Static information storage and retrieval

Read/write circuit

Signals

C365S185230, C365S188000, C365S189040

Reexamination Certificate

active

07420858

ABSTRACT:
Methods and apparatus are provided for read/write control and bit selection with false read suppression in an SRAM. According to one aspect of the invention, a bit select circuit is provided for an SRAM. The disclosed bit select circuit includes one or more transistors controlled by a write control gate signal to prevent data from being read from one or more data cells during a write operation. The transistors can include, for example, a pair of gated transistors controlled by the write control gate signal. The write control gate signal prevents data from being read from one or more data cells while the write control gate signal is in a predefined state.

REFERENCES:
patent: 5703831 (1997-12-01), Sawada
patent: 6014340 (2000-01-01), Sawada
patent: 7085173 (2006-08-01), Bunce et al.
patent: 2006/0268626 (2006-11-01), Hamzaoglu et al.

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