Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2005-07-15
2008-09-09
Garber, Charles D. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C257SE21595
Reexamination Certificate
active
07422972
ABSTRACT:
An integrated circuit programmable structure (60) is formed for use a trim resistor and/or a programmable fuse. The programmable structure comprises placing heating elements (70) in close proximity to the programmable structure (60) to heat the programmable structure (60) during programming.
REFERENCES:
patent: 4210996 (1980-07-01), Amemiya et al.
patent: 4285001 (1981-08-01), Gerzberg et al.
patent: 4947020 (1990-08-01), Imamura et al.
patent: 5296722 (1994-03-01), Potash et al.
patent: 5466484 (1995-11-01), Spraggins et al.
patent: 5682049 (1997-10-01), Nguyen
patent: 6586282 (2003-07-01), Takasu
patent: 2002/0008302 (2002-01-01), Singh et al.
Babcock Jeffrey A.
Balster Scott
Howard Gregory E.
Pinto Angelo
Steinmann Philipp
Brady III Wade J.
Garber Charles D.
Patel Reema
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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