Thin film transistor array panel and manufacturing method...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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C438S708000, C438S508000

Reexamination Certificate

active

10922343

ABSTRACT:
A method of manufacturing a thin film transistor array panel is provided, which includes: forming a gate line on a substrate; depositing a gate insulating layer and a semiconductor layer in sequence on the gate line; depositing a lower conductive film and an upper conductive film on the semiconductor layer; photo-etching the upper conductive film, the lower conductive film, and the semiconductor layer; depositing a passivation layer; photo-etching the passivation layer to expose first and second portions of the upper conductive film; removing the first and the second portions of the upper conductive film to expose first and second portions of the lower conductive film; forming a pixel electrode on the first portion of the lower conductive film; removing the second portion of the lower conductive film to expose a portion of the semiconductor layer; and forming a columnar spacer on the exposed portion of the semiconductor layer.

REFERENCES:
patent: 6287899 (2001-09-01), Park et al.
patent: 6555409 (2003-04-01), Kim et al.
patent: 7023016 (2006-04-01), Lee et al.
patent: 2006/0209223 (2006-09-01), Choi et al.
patent: 2006/0289965 (2006-12-01), Park et al.

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