Two-cycle sensing in a two-terminal memory array having...

Details Two-cycle sensing in a two-terminal memory array having... Two-cycle sensing in a two-terminal memory array having...

2008-05-13

2008-05-13

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Differential sensing

C365S051000, C365S063000, C365S148000

Reexamination Certificate

active

11583676

ABSTRACT:
A two-terminal memory array includes a plurality of first and second conductive traces. An address unit operatively applies a select voltage across a selected pair of the first and second conductive traces and applies a non-select voltage potential to unselected traces. A total current flowing in the selected first conductive trace and a leakage current flowing through unselected second conductive traces are sensed by a sense unit in a one cycle or a two cycle pre-read operation. The total and leakage currents can be combined with a reference signal to derive a data signal indicative of one of a plurality of conductivity profiles that represent stored data. The conductivity profiles can be stored in a resistive state memory element that is electrically in series with the selected first and second conductive traces.

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