Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2008-03-04
2008-03-04
Lane, Jack (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S114000, C710S039000
Reexamination Certificate
active
10094827
ABSTRACT:
On a dominant logical unit provided by a mass-storage device, hot spare disks are employed to create a much larger, disk-based time-ordered WRITE-request buffer that spans, in one embodiment, both electronic memory and hot spare disks. The much larger time-ordered WRITE-request buffer in the modified dominant logical unit allows for storing WRITE requests in time order for a much longer period of time during communications failure between the dominant logical unit and remote-mirror logical unit than in the current techniques that employ only an electronic-memory-based time-ordered WRITE-request buffer. On the remote-mirror logical unit, mass-storage space is provided for an alternate logical unit that can be resynchronized with the dominant logical unit following restoration of communications between the dominant logical unit and remote-mirror logical unit. When resynchronization is complete, a simple logical-unit-pointer switch operation can be employed to designate the alternate logical unit as the new remote-mirror logical unit, and the previous remote-mirror logical unit as the alternate logical unit.
REFERENCES:
patent: 6338126 (2002-01-01), Ohran et al.
patent: 6842835 (2005-01-01), Fujimoto et al.
Hewlett--Packard Development Company, L.P.
Lane Jack
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