Integrated circuit having a doped porous dielectric and...

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate

Reexamination Certificate

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Details

C438S235000, C438S296000, C438S398000, C438S787000

Reexamination Certificate

active

10844984

ABSTRACT:
In one aspect of the invention, a method for forming an integrated circuit having an at least substantially doped porous dielectric includes forming a semiconductor device. The semiconductor device includes at least a portion of a semiconductor substrate. The method also includes forming a dielectric layer disposed outwardly from the semiconductor substrate and surrounding at least a portion of the semiconductor device. The dielectric layer includes an at least substantially porous dielectric material doped with at least one dopant. In addition, the method includes forming a contact layer disposed outwardly from the dielectric layer and operable to provide electrical connection to the semiconductor device.

REFERENCES:
patent: 5728618 (1998-03-01), Tseng
patent: 6255156 (2001-07-01), Forbes et al.
patent: 6316833 (2001-11-01), Oda
patent: 6511923 (2003-01-01), Wang et al.
patent: 6583071 (2003-06-01), Barnes et al.
patent: 2001/0055725 (2001-12-01), Hussein et al.
patent: 2004/0130029 (2004-07-01), Raaijmakers et al.
patent: 2004/0227247 (2004-11-01), Chooi et al.

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