Processor block placement relative to memory in a...

Details Processor block placement relative to memory in a... Processor block placement relative to memory in a...

2008-01-01

2008-01-01

Bragdon, Reginald (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S125000, C716S030000

Reexamination Certificate

active

11035776

ABSTRACT:
A programmable logic device having groups of data and instruction memory blocks separated by a processor block is described. The processor block including an embedded processor and data and instruction memory controllers. The data and instruction memory blocks respectively including data and memory groupings of block random access memories.

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Xilinx, Inc., “Virtex-II Platform FPGA Handbook”, Dec. 6, 2000, pp. 33-75, available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124.

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