Memory controller, semiconductor integrated circuit device,...

Details Memory controller, semiconductor integrated circuit device,... Memory controller, semiconductor integrated circuit device,...

2008-04-29

2008-04-29

Sparks, Donald (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S150000, C711S167000, C711S168000

Reexamination Certificate

active

11100228

ABSTRACT:
A memory controller is connected with a first memory requiring refresh and a second memory not requiring refresh, both of which share part of a bus, comprising: a first memory controller that conducts access control and auto-refresh control for the first memory; a second memory controller that conducts access control for the second memory; and an arbiter that adjusts the timing of outputting a signal generated for the first memory and another signal generated for the second memory to a bus, wherein, with a judgment that the signal from the first memory controller is an auto-refresh request, a refresh request signal for the first memory is outputted even while the second memory is being accessed.

REFERENCES:
patent: 5907857 (1999-05-01), Biswas
patent: 6336166 (2002-01-01), Kelly
patent: 6513094 (2003-01-01), Magro
patent: 6941415 (2005-09-01), Ryan
patent: 7043599 (2006-05-01), Ware et al.
patent: 2002-269980 (2002-09-01), None

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