Method and apparatus for segregating shared and non-shared...

Details Method and apparatus for segregating shared and non-shared... Method and apparatus for segregating shared and non-shared...

2008-04-01

2008-04-01

Elmore, Stephen (Department: 2185)

Electrical computers and digital processing systems: memory

Addressing combined with specific memory configuration or...

For multiple memory modules

C711S130000, C711S144000, C711S147000, C711S154000, C711S156000

Reexamination Certificate

active

11144207

ABSTRACT:
In a multiprocessor system, accesses to a given processor's banked cache are controlled such that shared data accesses are directed to one or more banks designated for holding shared data and/or non-shared data accesses are directed to one or more banks designated for holding non-shared data. A non-shared data bank may be designated exclusively for holding non-shared data, so that shared data accesses do not interfere with non-shared accesses to that bank. Also, a shared data bank may be designated exclusively for holding shared data, and one or more banks may be designated for holding both shared and non-shared data. An access control circuit directs shared and non-shared accesses to respective banks based on receiving a shared indication signal in association with the accesses. Further, in one or more embodiments, the access control circuit reconfigures one or more bank designations responsive to a bank configuration signal.

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