Self-aligned gate sidewall spacer in a corrugated FET

Details Self-aligned gate sidewall spacer in a corrugated FET Self-aligned gate sidewall spacer in a corrugated FET

1996-01-16

1998-08-11

Wallace, Valencia

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257332, 257333, 438302, H01L 2976, H01L 2994

Patent

active

057930821

ABSTRACT:
A self-aligned gate sidewall spacer and method of forming the sidewall spacer in a corrugated FET structure, comprising the steps of depositing a first oxide layer on a substrate; forming a substrate trench, having a substrate trench bottom and substrate trench sidewalls in the substrate; forming a gate electrode trench intersecting the substrate trench and filling the gate electrode trench with gate polysilicon for forming a gate electrode, the gate electrode having first and second gate sidewalls; depositing a second oxide layer over the gate electrode trench and substrate trench; and etching the second oxide layer for forming a sidewall spacer on each of the first and second gate sidewalls.

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