Memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S202000, C257S203000, C257S207000, C257S208000, C257S211000, C257S331000, C257S341000, C257S903000, C257S905000, C257S909000

Reexamination Certificate

active

11203997

ABSTRACT:
A memory capable of reducing the memory cell size is provided. In this memory, a first gate electrode of a first selection transistor and a second gate electrode of a second selection transistor are provided integrally with a word line, and arranged to obliquely extend with respect to the longitudinal direction of a first impurity region on a region formed with memory cells and to intersect with the first impurity region on regions formed with the first selection transistor and the second selection transistor in plan view.

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