Semiconductor integrated circuit device

Electronic digital logic circuitry – Interface – Supply voltage level shifting

Reexamination Certificate

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Details

C326S083000, C327S534000

Reexamination Certificate

active

11526612

ABSTRACT:
A semiconductor integrated circuit device which includes a logical circuit containing a MIS transistor on a semiconductor substrate, a control circuit for controlling a threshold voltage of the MIS transistor in the logical circuit, an oscillation circuit containing a MIS transistor on the semiconductor substrate, and a buffer circuit, the control circuit compares the frequency of the oscillation output and frequency of a clock signal to output a first control signal, the first control signal controls a threshold voltage of the MIS transistor of the oscillation circuit, and the buffer circuit is inputted with the first control signal to output a second control signal corresponding to the first control signal, the second control signal controlling the threshold voltage of the MIS transistor of the logical circuit.

REFERENCES:
patent: 5297097 (1994-03-01), Etoh et al.
patent: 5352939 (1994-10-01), Hirabayashi et al.
patent: 5420528 (1995-05-01), Shigehara
patent: 5612643 (1997-03-01), Hirayama
patent: 5672995 (1997-09-01), Hirase et al.
patent: 5694072 (1997-12-01), Hsiao et al.
patent: 5773855 (1998-06-01), Colwell et al.
patent: 5796129 (1998-08-01), Mizuno
patent: 5894142 (1999-04-01), Fiduccia et al.
patent: 5920089 (1999-07-01), Kanazawa et al.
patent: 6046627 (2000-04-01), Itoh et al.
patent: 6140686 (2000-10-01), Mizuno et al.
patent: 6166577 (2000-12-01), Mizuno et al.
patent: 6191615 (2001-02-01), Koga
patent: 6404232 (2002-06-01), Mizuno et al.
patent: 6489833 (2002-12-01), Miyazaki et al.
patent: 6774706 (2004-08-01), Miyazaki et al.
patent: 2001/0042085 (2001-11-01), Peairs et al.
patent: 742507 (1996-11-01), None
patent: 61-214448 (1986-09-01), None
patent: 3167795 (1991-07-01), None
patent: 5108194 (1993-04-01), None
patent: 5110427 (1993-04-01), None
patent: 5152935 (1993-06-01), None
patent: 7066631 (1995-03-01), None
patent: 8-274620 (1996-10-01), None
patent: 8-314506 (1996-11-01), None
patent: 9036246 (1997-02-01), None
patent: 188982 (2004-06-01), None
English Translation of Japanese Office Action dated Feb. 24, 2004.
Fujii et al, A 45 ns 16Mb DRAM with Triple-Well Structure, ISSCC 89/Friday, Feb. 17, 1989, 1989 IEEE Int'l Solid-State Circuits Conference.
Chen et al, “A High Speed SOI Technology with 12ps/18ps Gate Delay Operating at 5V/1.5V”, 1992 IEEE, pp. 2.5.1-2.5.4.
Soden et al, Identifying Defects in Deep-Submicron CMOS ics,The Practical Engineer, Sep. 1996, pp. 66-71.
Translation of Final Decision of Rejection, Issue No. 188982, Issue Date Jun. 1, 2004; Patent Application No. Hei 8-349427.

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