Method and apparatus for providing an integrated active...

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S404000, C438S410000, C438S706000

Reexamination Certificate

active

10632570

ABSTRACT:
A method and apparatus for providing integrated active regions on silicon-on-insulator (SOI) devices by oxidizing a portion of the active layer. When the active layer of the SOI wafer is relatively thick, such as about 200 Å to 1000 Å or greater, the etching process partially removes the active layer. The remaining active layer is oxidized prior to a wet dip for removing the mask layer, preventing the wet dip process from undercutting the active region. When the active layer of the SOI wafer is relatively thin, such as about 25 Å to 400 Å, the partial etching step may be reduced or eliminated. In this case, the active layer is oxidized with little or no etching of the active layer. The exposed active layer is oxidized to prevent the wet dip process from undercutting the active region.

REFERENCES:
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patent: 6642124 (2003-11-01), Yamauchi
patent: 6864152 (2005-03-01), Mirbedini et al.
patent: 6879001 (2005-04-01), Yagishita et al.
patent: 2002/0022308 (2002-02-01), Ahn et al.
patent: 2002/0090763 (2002-07-01), Tseng
patent: 2003/0203285 (2003-10-01), Chung et al.

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