Method of designing wiring structure of semiconductor device...

Details Method of designing wiring structure of semiconductor device... Method of designing wiring structure of semiconductor device...

2008-05-13

2008-05-13

Kik, Phallaka (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C703S002000, C703S016000

Reexamination Certificate

active

11244294

ABSTRACT:
A method of designing a wiring structure of an LSI is capable of reducing a capacitance variation ratio ΔC/C or a resistance-by-capacitance variation ratio Δ(RC)/(RC) of the wiring structure. The method sets a process-originated variation ratio (δP) for the wiring structure, a tolerance (ξC) for the capacitance variation ratio (ΔC/C), and a tolerance (ξRC) for the resistance-by-capacitance variation ratio (Δ(RC)/(RC)), evaluates a fringe capacitance ratio (F=CF/CP) according to a fringe capacitance CFand parallel-plate capacitance CPof the wiring structure, and determines the wiring structure so that the fringe capacitance ratio (F) may satisfy the following:For⁢ΔCC≤ξ⁢C,⁢F≥δPξC-1(1)For⁢Δ⁡(RC)RC≤ξRC,⁢F≤(1-δP)⁢δPδP-ξRC-1(2)The method employs an equivalent-variations condition defined as |ΔC/C|=|Δ(RC)/(RC)| to determine the shape parameters of each wire of the wiring structure.

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