Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-09-09
2008-09-09
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C430S005000
Reexamination Certificate
active
11150624
ABSTRACT:
Modifying sub-resolution assist features includes receiving a mask pattern for a photolithographic mask. The mask pattern includes main features, and the photolithographic mask is operable to pattern a wafer pattern for a semiconductor wafer. Placement of sub-resolution assist features for the main features is estimated. The following is repeated for one or more iterations: correcting the main features using a wafer pattern model operable to estimate the wafer pattern; evaluating the sub-resolution assist features according to the wafer pattern model; and modifying at least one sub-resolution assist feature in accordance with the evaluation.
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Brady III Wade J.
Levin Naum B
Siek Vuthe
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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