Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2008-09-23
2008-09-23
Gurley, Lynne A. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S336000, C257S337000, C257S338000, C257S339000, C257S340000, C257S341000, C257S342000, C257S343000, C257S491000, C257S492000, C257S493000, C257SE29256
Reexamination Certificate
active
10880907
ABSTRACT:
Drain-extended MOS transistors (T1, T2) and semiconductor devices (102) are described, as well as fabrication methods (202) therefor, in which a p-buried layer (130) is formed prior to formation of epitaxial silicon (106) over a substrate (104), and a drain-extended MOS transistor (T1, T2) is formed in the epitaxial silicon layer (106). The p-buried layer (130) may be formed above an n-buried layer (120) in the substrate (104) for high-side driver transistor (T2) applications, wherein the p-buried layer (130) extends between the drain-extended MOS transistor (T2) and the n-buried layer (120) to inhibit off-state breakdown between the source (154) and drain (156).
REFERENCES:
patent: 5852314 (1998-12-01), Depetro et al.
patent: 5976942 (1999-11-01), Ludikhuize
patent: 6211552 (2001-04-01), Efland et al.
patent: 6288424 (2001-09-01), Ludikhuize
patent: 6376891 (2002-04-01), Nagatani et al.
patent: 6475870 (2002-11-01), Huang et al.
patent: 6531355 (2003-03-01), Mosher et al.
patent: 6548874 (2003-04-01), Morton et al.
patent: 6570229 (2003-05-01), Harada
patent: 6593621 (2003-07-01), Tsuchiko et al.
patent: 6729886 (2004-05-01), Efland et al.
patent: 6734493 (2004-05-01), Chen et al.
patent: 6909143 (2005-06-01), Jeon et al.
patent: 7187033 (2007-03-01), Pendharkar
patent: 7265416 (2007-09-01), Choi et al.
patent: 2002/0053695 (2002-05-01), Liaw et al.
patent: 2007/0114607 (2007-05-01), Pendharkar
U.S. Appl. No. 10/890,648, filed Jul. 14, 2004, Pendharkar.
Brady III W. James
Gebremariam Samuel A.
Gurley Lynne A.
Keagy Rose Alyssa
Telecky , Jr. Frederick J.
LandOfFree
Drain-extended MOS transistors and methods for making the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Drain-extended MOS transistors and methods for making the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Drain-extended MOS transistors and methods for making the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3908808