Static information storage and retrieval – Read/write circuit – With shift register
Reexamination Certificate
2007-10-02
2007-10-02
Nguyen, Van Thu (Department: 2824)
Static information storage and retrieval
Read/write circuit
With shift register
C365S189011, C365S233100
Reexamination Certificate
active
11074467
ABSTRACT:
A buffer circuit includes a plurality of registers, a write register selector, a read register selector, and an address proximity detector. The write register selector operates in synchronism with a write clock signal and outputs write enable signals in a predetermined sequence for write-enabling the plurality of registers, one at a time. The read register selector operates in synchronism with a read clock signal and outputs read enable signals in the predetermined sequence for read-enabling the plurality of registers to be read, one at a time. The address proximity detector detects an event in which a difference between a register write-enabled by one of the write enable signals and a different register read-enabled by one of the read enable signals at a time in the predetermined sequence is equal to a predetermined value and outputs a reset signal upon detecting such event.
REFERENCES:
patent: 5912847 (1999-06-01), Tamaki
patent: 6381190 (2002-04-01), Shinkai
patent: 2005/0041459 (2005-02-01), McDonald
Cooper & Dunham LLP
Nguyen Dang
Nguyen Van Thu
Ricoh & Company, Ltd.
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