Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-10-23
2007-10-23
Lee, Calvin (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C257S751000
Reexamination Certificate
active
11492455
ABSTRACT:
A method is provided of forming contact vias. A dielectric region is formed to overlie substantially all of a transistor structure, the dielectric region having a substantially planar upper surface. A dielectric barrier layer is formed to overlie the upper surface of the dielectric region, the dielectric barrier layer being adapted to substantially prevent diffusion of one or more materials from above the dielectric barrier layer into the dielectric region. A first contact via is formed to extend through the dielectric barrier layer and the dielectric region to provide conductive communication with a conductive member of the transistor structure. A second contact via is formed to extend through the dielectric barrier layer and the dielectric region to provide conductive communication with one of a source region or a drain region of the transistor structure.
REFERENCES:
patent: 6211035 (2001-04-01), Moise et al.
patent: 6599813 (2003-07-01), Beyer et al.
patent: 6943398 (2005-09-01), Ito et al.
patent: 2003/0222299 (2003-12-01), Miura
Lee Calvin
Neff, Esq. Daryl K.
Schnurmann H. Daniel
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