Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2007-10-30
2007-10-30
Shalwala, Bipin (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S103000, C345S092000
Reexamination Certificate
active
10699813
ABSTRACT:
A shift register in which multiple stages are connected one after another to each other, the multiple stages having a first stage in which a start signal is coupled to an input terminal, the shift register sequentially outputting output signals of respective stages. The multiple stages have odd stages for receiving a first clock signal, and even stages for receiving a second clock signal having a phase opposite to the first clock signal. Each of the multiple stages has a pull-up section for providing a corresponding one of the first and second clock signals to an output terminal. A pull-up driving section is connected to an input node of the pull-up section. A pull-down section provides a first power voltage to the output terminal. A pull-down driving section is connected to an input node of the pull-down section.
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International Search Report, International Application No. PCT/KR02/00191.
Jeon Jin
Kim Hyung-Guel
Moon Seung-Hwan
Dharia Prabodh
F. Chau & Assoc. LLC
Samsung Electronics Co,. Ltd.
Shalwala Bipin
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