Apparatus for hysteresis based process compensation for CMOS...

Details Apparatus for hysteresis based process compensation for CMOS... Apparatus for hysteresis based process compensation for CMOS...

2007-10-16

2007-10-16

Liu, Shuwang (Department: 2819)

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

C326S083000, C326S086000, C326S087000, C326S112000, C327S112000

Reexamination Certificate

active

11279658

ABSTRACT:
A process compensation circuit for an inverting element of a CMOS device, including a duplicate inverting element connected in parallel with the inverting element of the CMOS device. An upside-down inverter stage has an input connected to the output of the duplicate inverting element, and an output connected to the output of the inverting element of the CMOS device. The upside-down inverter stage is configured to counteract a delayed logic transition of the output of the inverting element of the CMOS device in the event of a process skew between NFET and PFET devices.

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