System and method of re-ordering store operations within a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

Reexamination Certificate

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C710S040000

Reexamination Certificate

active

11054450

ABSTRACT:
A system and method for re-ordering store operations from a processor core to a store queue. When a store queue receives a new processor-issued store operation from the processor core, a store queue controller allocates a new entry in the store queue. In response to allocating the new entry in the store queue, the store queue controller determines whether or not the new entry is dependent on at least one other valid entry in the store queue. In response to determining the new entry is dependent on at least one other valid entry in the store queue, the store queue controller inhibits requesting of the new entry to the RC dispatch logic until each valid entry on which the new entry is dependent has been successfully dispatched to an RC machine by the RC dispatch logic.

REFERENCES:
patent: 2004/0111594 (2004-06-01), Feiste et al.
patent: 2006/0129764 (2006-06-01), Bellows et al.

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