Semiconductor memory with virtual ground architecture

Details Semiconductor memory with virtual ground architecture Semiconductor memory with virtual ground architecture

2007-10-30

2007-10-30

Wilczewski, Mary (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S315000, C257S317000, C257S321000

Reexamination Certificate

active

10857637

ABSTRACT:
Insulation regions in the manner of STI isolations, which run transversely with respect to the word lines, isolate the source/drain regions of adjacent memory cells. Metallic bit lines are applied on the top side and patterned for example along zigzag lines such that the source/drain regions of a memory transistor which are contact-connected by the bit lines are in each case electrically connected by two mutually adjacent bit lines.

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