Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2007-10-02
2007-10-02
Peugh, Brian R. (Department: 2187)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S206000, C710S026000
Reexamination Certificate
active
10769357
ABSTRACT:
A virtual address translation table and an on-chip address cache are usable for translating virtual addresses to physical addresses. Address translation information is provided using a cluster that is associated with some range of virtual addresses and that can be used to translate any virtual address in its range to a physical address, where the sizes of the ranges mapped by different clusters may be different. Clusters are stored in an address translation table that is indexed by virtual address so that, starting from any valid virtual address, the appropriate cluster for translating that address can be retrieved from the translation table. Recently retrieved clusters are stored in an on-chip cache, and a cached cluster can be used to translate any virtual address in its range without accessing the address translation table again.
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Case et al., U.S. Appl. No. 10/769,388 for “Multi-client virtual address translation system with translation units of variable-range size,” filed Jan. 30, 2004.
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Case Colyn S.
Treichler Sean J.
Vyshetsky Dmitry
Bradley Matthew
NVIDIA Corporation
Peugh Brian R.
Townsend and Townsend / and Crew LLP
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