Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate
2007-02-20
2007-02-20
Phung, Anh (Department: 2824)
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
C165S182000
Reexamination Certificate
active
11198469
ABSTRACT:
An array of memory cells having a predetermined group of storage cells, arranged in a row, also have an arrangement of one or more reference cells fabricated to be adjacent to or proximate to the row of storage cells. The reference cells are written to, erased, or programmed when the storage cells are written to, erased, or programmed. The same number of write, erase, or program cycles and the proximity of the reference cells to the storage cells maintain an operational matching of the storage cells and reference cells.
REFERENCES:
patent: 6094368 (2000-07-01), Ching
patent: 6418054 (2002-07-01), Hollmer
patent: 6507517 (2003-01-01), Rolandi et al.
patent: 6584017 (2003-06-01), Maayan et al.
patent: 6819589 (2004-11-01), Aakjer
patent: 7099202 (2006-08-01), Son et al.
patent: 2002/0015326 (2002-02-01), Rolandi et al.
patent: 2004/0218420 (2004-11-01), Aakjer
Chan Johnny
Ng Philip S.
Son Jinshu
Atmel Corporation
Nguyen Hien
Phung Anh
Schneck Thomas
Schneck & Schneck
LandOfFree
Method of sensing an EEPROM reference cell does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of sensing an EEPROM reference cell, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of sensing an EEPROM reference cell will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3887275