SOI single crystalline chip structure with multi-thickness...

Details SOI single crystalline chip structure with multi-thickness... SOI single crystalline chip structure with multi-thickness...

2007-02-06

2007-02-06

Flynn, Nathan J. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S499000, C257SE21563

Reexamination Certificate

active

10834263

ABSTRACT:
A SOI (silicon on insulator) single crystalline chip structure is provided. The SOI chip structure has a first silicon layer for at least one SOI device to be placed thereon, at least one buried oxide area with a predetermined depth placed at a predetermined position of the first silicon layer in order to enable the first silicon layer to have at least two different silicon layer thicknesses. The buried oxide area is filled with a silicon oxide material serving as an insulating area, and a second silicon layer is located below the first silicon layer and the buried oxide area.

REFERENCES:
patent: 5476819 (1995-12-01), Warren
patent: 6063652 (2000-05-01), Kim
patent: 6333532 (2001-12-01), Davari et al.
patent: 6384422 (2002-05-01), Shimoji
patent: 6462428 (2002-10-01), Iwamatsu

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