System, method and storage medium for bus calibration in a...

Details System, method and storage medium for bus calibration in a... System, method and storage medium for bus calibration in a...

2007-12-04

2007-12-04

Trujillo, James K. (Department: 2116)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

C365S189011

Reexamination Certificate

active

10977048

ABSTRACT:
A cascaded interconnect system with one or more memory modules, a memory controller and a memory bus that utilizes periodic recalibration. The memory modules and the memory controller are directly interconnected by a packetized multi-transfer interface via the memory bus and provide scrambled data for use in the periodic recalibration.

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