Discrete tests for weak bits

Details Discrete tests for weak bits Discrete tests for weak bits

2007-11-20

2007-11-20

Wilson, Yolanda L (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S718000, C365S201000

Reexamination Certificate

active

10801588

ABSTRACT:
A testing method for semiconductor memory that selects memory cells adjacent to the periphery of the memory array and to a memory twist. These memory cells are subjected to a more demanding test voltage and write recovery time to further stress the memory cells and reveal weak or marginally good memory cells.

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Official Notice of Rejection mailed Aug. 3, 2007.

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