Multiple bit chalcogenide storage device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S003000, C257SE27004

Reexamination Certificate

active

11339869

ABSTRACT:
Multi-terminal chalcogenide memory cells having multiple binary or non-binary bit storage capacity and methods of programming same. The memory cells include a pore region containing a chalcogenide material along with three or more electrical terminals in electrical communication therewith. The configuration of terminals delineates spatially distinct regions of chalcogenide material that may be selectively and independently programmed to provide multibit storage. The application of an electrical signal (e.g. electrical current or voltage pulse) between a pair of terminals effects a structural transformation in one of the spatially distinct portions of chalcogenide material. Application of electrical signals to different pairs of terminals within a chalcogenide device effects structural transformations in different portions of the chalcogenide material. The structural states produced by the structural transformations may be used for storage of information values in a binary or non-binary (e.g. multilevel) system. The selection of terminals provides for the selective programming of specific and distinct portions within a continuous volume of chalcogenide material, where each selectively programmed portion provides for the storage of a single binary or non-binary bit. In devices having three or more terminals, two or more selectively programmable portions are present within the volume of chalcogenide material occupying the pore region and multibit storage is accordingly realized. The instant invention further includes methods of programming chalcogenide memory cells having three or more terminals directed at the storage of multiple bits of information in binary or non-binary systems.

REFERENCES:
patent: 6617192 (2003-09-01), Lowrey et al.
patent: 6740921 (2004-05-01), Matsuoka et al.
patent: 6809362 (2004-10-01), Gilton

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