Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing
Reexamination Certificate
2007-02-06
2007-02-06
Park, Ilwoo (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Direct memory accessing
C710S023000, C710S033000, C710S305000
Reexamination Certificate
active
10182866
ABSTRACT:
In asynchronous communication, an efficient data transfer can be performed between an external bus and an internal bus. A packet obtained from the external bus by the asynchronous communication is stored into first memory means. The packet in the first memory means is transferred to second memory means via the internal bus. Data obtained by decomposing the packet stored in the second memory means is transferred to an internal signal processing system. Contrarily, the data from the internal signal processing system is packetized and transferred to the second memory means and transferred to third memory means. The transfer between the first memory means and the second memory means and the transfer between the second memory means and the third memory means are set to DMA transfer. Top information indicating that the first unit data of the DMA transfer is a top of the packet or not and end information indicating that the last unit data is an end of the packet or not are set into a control register for the DMA transfer. The DMA transfer is executed in accordance with the setting in the control register. The top information and the end information are reflected to a transfer destination of the DMA transfer.
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Frommer William S.
Frommer & Lawrence & Haug LLP
Park Ilwoo
Presson Thomas F.
Sony Corporation
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