Semiconductor memory devices in which the number of memory...

Details Semiconductor memory devices in which the number of memory... Semiconductor memory devices in which the number of memory...

2007-12-25

2007-12-25

Dinh, Son (Department: 2824)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S230030, C365S230080

Reexamination Certificate

active

11214657

ABSTRACT:
A semiconductor memory device includes a plurality of memory banks. A refresh control block is responsive to a control address that identifies at least one of the plurality of memory banks to be refreshed. The refresh control block is configured to control refreshing of the at least one of the plurality of memory banks to be refreshed. The control address is used during read and/or write operations of the plurality of memory banks.

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patent: 7051260 (2006-05-01), Ito et al.
patent: 2003/0185078 (2003-10-01), Tsukude
patent: 2003-317473 (2003-11-01), None
patent: 10-1997-030229 (1997-06-01), None
patent: 1020020003032 (2002-01-01), None

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