Method and apparatus for analyzing clock-delay, and computer...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

11167311

ABSTRACT:
An input unit receives circuit information on a circuit. A first calculating unit calculates delay-distribution information of a data path and delay-distribution information of a clock path, based on the circuit information. A second calculating unit calculates delay-difference-distribution information between the data path and the clock path by using the delay-distribution information of the data path and the delay-distribution information of the clock path. A third calculating unit calculates a clock-delay value of the circuit based on the delay-difference-distribution information.

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patent: 7-182381 (1995-07-01), None

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