Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-06-05
2007-06-05
Lin, Sun James (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
11037227
ABSTRACT:
A method of automatically correcting mask pattern data includes steps (a) to (d). Here, in this method, the mask pattern data are for producing photo masks used in manufacturing processes of a semiconductor integrated circuit where cells including dummy cells are placed on a semiconductor chip. The step (a) is a process of merging tentatively an assistant mask layer into one of main mask layers. Each of the main mask layers corresponds to one of the photo masks. The assistant mask layer includes first regions, each of which corresponds to one of the dummy cells. The step (b) is a process of checking whether or not the one of main mask layers and the merged assistant mask layer agree with a design rule. The step (c) is a process of replacing the one of main mask layers with another of the main mask layers, into which the assistant mask layer is merged, when a violation against the design rule is found in the step (b). The step (d) is a process of converting the assistant mask layer into the merged one of main mask layers. The merged one of main mask layers does not have a violation against the design rule.
REFERENCES:
patent: 2005/0044522 (2005-02-01), Maeda
patent: 2005/0076320 (2005-04-01), Maeda
patent: 6-318643 (1994-11-01), None
Lin Sun James
NEC Electronics Corporation
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