Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2007-06-05
2007-06-05
Dickey, Thomas L. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257SE29134
Reexamination Certificate
active
10829173
ABSTRACT:
A second semiconductor region is formed on a first semiconductor region. A third semiconductor region is formed on a part of the second semiconductor region. A trench ranges from a surface of the third semiconductor region to the third semiconductor region and the second semiconductor region. The trench penetrates the third semiconductor region, and the depth of the trench is shorter than that of a deepest bottom portion of the second semiconductor region, and the second semiconductor region does not exist under a bottom surface of the trench. A gate insulating film is formed on facing side surfaces of the trench. First and second gate electrodes are formed on the gate insulating film. The first and second gate electrodes are separated from each other. The conductive material is formed between the first and second gate electrodes on the side surfaces of the trench, with an insulating film intervened therebetween.
REFERENCES:
patent: 4541001 (1985-09-01), Schutten et al.
patent: 5072266 (1991-12-01), Bulucea et al.
patent: 5126807 (1992-06-01), Baba et al.
patent: 5776812 (1998-07-01), Takahashi et al.
patent: 5929481 (1999-07-01), Hshieh et al.
patent: 6015737 (2000-01-01), Tokura et al.
patent: 6093606 (2000-07-01), Lin et al.
patent: 5-7002 (1993-01-01), None
patent: 9-181311 (1997-07-01), None
patent: 2000-269487 (2000-09-01), None
patent: 20010077358 (2001-03-01), None
patent: 2001-119023 (2001-04-01), None
patent: 2002-26324 (2002-01-01), None
patent: 2002-94061 (2002-03-01), None
Kawaguchi Yusuke
Nakagawa Akio
Ono Syotaro
Dickey Thomas L.
Kabushiki Kaisha Toshiba
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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