Three-dimensional-memory-based self-test integrated circuits...

Details Three-dimensional-memory-based self-test integrated circuits... Three-dimensional-memory-based self-test integrated circuits...

2007-12-04

2007-12-04

Pham, Long (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S401000

Reexamination Certificate

active

10772053

ABSTRACT:
The three-dimensional memory (3D-M) can be used to carry the test data and/or test-data seeds for the circuit-under-test (CUT). When integrated with the CUT, 3D-M has minimum impact to the layout of the CUT. The CUT with integrated 3D-M supports IC self-test. Moreover, with a large bandwidth with the CUT, 3DM-based IC self-test enables at-speed test.

REFERENCES:
patent: 5130645 (1992-07-01), Levy
patent: 5239262 (1993-08-01), Grutzner et al.
patent: 5592616 (1997-01-01), Finch et al.
patent: 5835396 (1998-11-01), Zhang
patent: 6034882 (2000-03-01), Johnson et al.
patent: 6839873 (2005-01-01), Moore

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